| |
| align="center" style="background:#f0f0f0;"|'''Miseq_2cell''' |
|
| align="center" style="background:#f0f0f0;"|'''Miseq_2cell''' |
| |
| align="center" style="background:#f0f0f0;"|'''Miseq_3cell''' |
|
| align="center" style="background:#f0f0f0;"|'''Miseq_3cell''' |
| - |
| align="center" style="background:#f0f0f0;"|'''071634_118X_asm.ctg'''
|
+ |
| align="center" style="background:#f0f0f0;"|'''Miseq_4cell'''
|
| - |
| align="center" style="background:#f0f0f0;"|'''192221_118X_asm.ctg'''
|
+ |
| align="center" style="background:#f0f0f0;"|'''Miseq_17cell'''
|
| - |
| align="center" style="background:#f0f0f0;"|'''210845_118X_asm.ctg'''
|
+ |
| align="center" style="background:#f0f0f0;"|'''Miseq_d9'''
|
| |
| # contigs||80||93||83||61||69||68||66 |
|
| # contigs||80||93||83||61||69||68||66 |
